Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Low-power ASIC/FPGA based designs are important due to the need for extended battery life, reduced form factor, and lower packaging and cooling costs for electronic devices. These products require fast turnaround time because of the increasing demand for handheld electronic devices such as cell-phon...
Enregistré dans:
| Auteurs principaux: | , , |
|---|---|
| Format: | Livre numérique |
| Sprog: | Anglais |
| Udgivet: |
New York, NY :
Springer New York
2012.
Cham : Springer Nature |
| Online adgang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Kommentar: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low power design with high-level power estimation and power-aware synthesis, Sumit Ahuja, Avinash Lakshminarayana, Sandeep Kumar Shukla, New York, Springer, 2012, xxii, 170 p., 978-1-461-40871-0 • Low Power Design with High-Level Power Estimation and Power-Aware Synthesis, Texte imprimé, 9781461408734 • Low Power Design with High-Level Power Estimation and Power-Aware Synthesis, Texte imprimé, 9781489987808 |