Efficient test methodologies for high-speed serial links

With the increasing demand for higher data bandwidth, communication systems data rates have reached the multi-gigahertz range and even beyond. Advances in semiconductor technologies have accelerated the adoption of high-speed serial interfaces, such as PCI-Express, Serial-ATA, and XAUI, in order to...

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Hauptverfasser: Hong, Dongwoo, Cheng, Kwang-Ting (VerfasserIn)
Format: Livre numérique
Sprache:Anglais
Veröffentlicht: Dordrecht : Springer Netherlands [20..].
Cham : Springer Nature
Ausgabe:1st ed. 2010.
Schriftenreihe:Lecture Notes in Electrical Engineering 51
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Edition sous un autre format:• Efficient Test Methodologies for High-Speed Serial Links, Texte imprimé, 9789048134427
Beschreibung
Zusammenfassung:With the increasing demand for higher data bandwidth, communication systems data rates have reached the multi-gigahertz range and even beyond. Advances in semiconductor technologies have accelerated the adoption of high-speed serial interfaces, such as PCI-Express, Serial-ATA, and XAUI, in order to mitigate the high pin-count and the data-channel skewing problems. However, with the increasing number of I/O pins and greater data rates, significant challenges arise for testing high-speed interfaces in terms of test cost and quality, especially in high volume manufacturing (HVM) environments. Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques
Beschreibung:Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
ISBN:9789048134434
ISSN:1876-1119
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