Low power hardware synthesis from concurrent action-oriented specifications
Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications Gaurav Singh Sandeep K. Shukla This book introduces novel techniques for generating low-power hardware from a high-level description of a design in terms of Concurrent Action-Oriented Specifications (CAOS). It also describes...
Guardat en:
| Autors principals: | , |
|---|---|
| Format: | Livre numérique |
| Idioma: | Anglais |
| Publicat: |
New York, NY :
Springer New York
2010.
Cham : Springer Nature |
| Accés en línia: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications, Texte imprimé, 9781441964809 • Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications, Texte imprimé, 9781441964823 • Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications, Texte imprimé, 9781489987020 |
Taula de continguts:
- Related Work
- Background
- Low-Power Problem Formalization
- Heuristics for Power Savings
- Complexity Analysis of Scheduling in CAOS-Based Synthesis
- Dynamic Power Optimizations
- Peak Power Optimizations
- Verifying Peak Power Optimizations Using SPIN Model Checker
- Epilogue.