Robotic exploration and landmark determination : hardware-efficient algorithms and FPGA implementations
Much of the research effort in mobile robots in the recent past has been on sensing and design of time-efficient algorithms for tasks such as localization, mapping and navigation. Mobile robots typically employ an embedded computer for high level computations. As applications of robots expand, there...
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| Главные авторы: | , |
|---|---|
| Формат: | Livre numérique |
| Язык: | Anglais |
| Опубликовано: |
Berlin, Heidelberg :
Springer Berlin Heidelberg
[20..].
Cham : Springer Nature |
| Редактирование: | 1st ed. 2008. |
| Серии: | Studies in Computational Intelligence
81 |
| Online-ссылка: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Примечание: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Robotic Exploration and Landmark Determination, Texte imprimé, 9783540753933 • Robotic Exploration and Landmark Determination, Texte imprimé, 9783642094651 • Robotic Exploration and Landmark Determination, Texte imprimé, 9783540844532 • Robotic Exploration and Landmark Determination, Texte imprimé, 9783540753933 |
| Итог: | Much of the research effort in mobile robots in the recent past has been on sensing and design of time-efficient algorithms for tasks such as localization, mapping and navigation. Mobile robots typically employ an embedded computer for high level computations. As applications of robots expand, there is a need to investigate architecturally efficient choices for this embedded computing platform. In particular, it is valuable to process data to obtain time, space and energy-efficient solutions for various robotic tasks. This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates. A robot fabricated with this FPGA on-board serves to validate the efficacy of the approach. Numerous experiments with the robot are reported |
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| Примечание: | Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| ISBN: | 9783540753940 |
| ISSN: | 1860-9503 |
| Доступ: | Accès en ligne pour les établissements français bénéficiaires des licences nationales Accès soumis à abonnement pour tout autre établissement Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 |