Defect-oriented testing for nano-metric CMOS VLSI circuits : :: SCD d'Orléans

Defect-oriented testing for nano-metric CMOS VLSI circuits : 2nd edition

Defect-oriented testing for nano-metric CMOS VLSI circuits : 2nd edition

Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and interconnect dimensions goes well beyond acceptabl...

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Opis bibliograficzny
1. autor:	Sachdev, Manoj, 19..-
Kolejni autorzy:	Pineda de Gyvez, José, électronicien (Dyrektor wydawnictwa)
Format:	Livre numérique
Język:	Anglais
Wydane:	New York, NY : Springer US : Imprint: Springer [20..]. Cham : Springer Nature
Seria:	Frontiers in electronic testing 34
Dostęp online:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Komentarz:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits, Texte imprimé, 9780387465463

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