Leakage in Nanometer CMOS Technologies
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumptio...
Enregistré dans:
| Auteur principal: | |
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| Autres auteurs: | |
| Format: | Livre numérique |
| Langue: | Anglais |
| Publié: |
New York, NY :
Springer US
[20..].
Cham : Springer Nature |
| Édition: | 1st ed. 2006. |
| Collection: | Integrated Circuits and Systems
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| Accès en ligne: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Note: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Leakage in nanometer CMOS technologies, [edited by] Siva G. Narendra, Anantha Chandrakasan, 1st ed., New York, NY, Springer, 2005, X-307 p., Series on integrated circuits and systems, 0-387-25737-3 • Leakage in Nanometer CMOS Technologies, Texte imprimé, 9781441938268 • Leakage in Nanometer CMOS Technologies, Texte imprime, 9780387506838 |
| Résumé: | Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers |
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| Description: | Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| ISBN: | 9780387281339 |
| ISSN: | 1558-9420 |
| Accès: | Accès en ligne pour les établissements français bénéficiaires des licences nationales Accès soumis à abonnement pour tout autre établissement Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 |