On-Chip interconnect with aelite : composable and predictable systems
On-Chip Interconnect with aelite: Composable and Predictable Systems by: (Authors) Andreas Hansson Kees Goossens Embedded systems are comprised of components integrated on a single circuit, a System on Chip (SoC). One of the critical elements of such an SoC, and the focus of this work, is the on-chi...
Gespeichert in:
| Hauptverfasser: | , |
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| Format: | Livre numérique |
| Sprache: | Anglais |
| Veröffentlicht: |
New York, NY :
Springer New York
2011.
Cham : Springer Nature |
| Schriftenreihe: | Embedded Systems
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| Online Zugang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Anmerkung: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • On-Chip Interconnect with aelite, Texte imprimé, 9781441964960 • On-Chip Interconnect with aelite, Texte imprimé, 9781441968661 • On-Chip Interconnect with aelite, Texte imprimé, 9781461427117 |
| Zusammenfassung: | On-Chip Interconnect with aelite: Composable and Predictable Systems by: (Authors) Andreas Hansson Kees Goossens Embedded systems are comprised of components integrated on a single circuit, a System on Chip (SoC). One of the critical elements of such an SoC, and the focus of this work, is the on-chip interconnect that enables different components to communicate with each other. The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs. Uses real-world illustrations extensively, in the form of case studies and examples that communicate the power of the methods presented; Uses one consistent, running example throughout the book. This example is introduced in the introductory chapter and supports the presentation throughout the work, with additional details given in each chapter; Content has both breadth (architecture, resource allocation, hardware/software instantiation, formal verification) and depth (block-level architecture description, allocation algorithms, complete run-time APIs, detailed formal models, complete case studies mapped to FPGAs); Includes numerous case studies, e.g. a JPEG decoder, set-top box and digital radio design. |
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| Beschreibung: | Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| ISBN: | 9781441968654 |
| ISSN: | 2193-0163 |
| Zugangseinschränkungen: | Accès en ligne pour les établissements français bénéficiaires des licences nationales Accès soumis à abonnement pour tout autre établissement Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 |