Hierarchical Modeling for VLSI Circuit Testing :: SCD d'Orléans

Hierarchical Modeling for VLSI Circuit Testing

Hierarchical Modeling for VLSI Circuit Testing

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Bhattacharya, Debashis, Hayes, John P. (VerfasserIn)
Format:	Livre numérique
Sprache:	Anglais
Veröffentlicht:	Cham : Springer International Publishing [20..]. Cham : Springer Nature
Online Zugang:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Anmerkung:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Hierarchical Modeling for VLSI Circuit Testing, 978-1-4612-8819-0

Ähnliche Einträge

Power-constrained Testing of VLSI Circuits
von: Nicolici, Nicola, 19..-, et al.

Delay Fault Testing for VLSI Circuits
von: Krstić, Angela, et al.

Circuit Design for CMOS VLSI
von: Uyemura, John P.

On-Line Testing for VLSI

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits
von: Bushnell, Michael Lee, 1950-, et al.

Defect-oriented testing for nano-metric CMOS VLSI circuits : 2nd edition
von: Sachdev, Manoj, 19..-

Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
von: Michael, Christopher, et al.

Testing and Diagnosis of VLSI and ULSI

Design of VLSI Circuits : Based on VENUS
von: Hörbst, Egon, 1941-, et al.

Conception des circuits VLSI : du composant au système
von: Anceau, François, 1940-2020, informaticien, et al.
Veröffentlicht: (2007)

Interconnection Noise in VLSI Circuits
von: Moll, Francesc, et al.

Routing congestion in VLSI circuits : estimation and optimization
von: Saxena, Prashant, et al.
Veröffentlicht: (2007)

Hierarchical Quantile Modeling : Theory, Methodology and Applications
von: Tian, Maozai
Veröffentlicht: (2024)

The Bounding Approach to VLSI Circuit Simulation
von: Zukowski, Charles A.

Computer Design Aids for VLSI Circuits

Relaxation Techniques for the Simulation of VLSI Circuits
von: White, Jacob K., et al.

Symbolic analysis and reduction of VLSI circuits
von: Qin, Zhanhai, 19..-, et al.
Veröffentlicht: (2005)

MOSFET Models for VLSI Circuit Simulation : Theory and Practice
von: Arora, Narain, 1943-

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations
von: Garg, Rajesh, et al.
Veröffentlicht: (2010)

Asynchronous Circuit Design for VLSI Signal Processing

Process and Device Simulation for MOS-VLSI Circuits

Hot-Carrier Reliability of MOS VLSI Circuits
von: Leblebici, Yusuf, 19..-...., informaticien, et al.

High-Performance Digital VLSI Circuit Design
von: Gu, Richard X., et al.

VLSI : circuits for emerging applications
von: Wojcicki, Tomasz
Veröffentlicht: (2015)

Switch-Level Timing Simulation of MOS VLSI Circuits
von: Rao, Vasant B., et al.

Thermal Testing of Integrated Circuits
von: Altet, Josep, et al.

Applied hierarchical modeling in ecology : analysis of distribution, abundance and species richness in R and BUGS Prelude and Static Models
von: Kery, Marc, 197.-, et al.
Veröffentlicht: (2015)

VLSI Design : An Internation Journal of Custom-Chip Design, Simulation, and Testing.

Testing and Reliable Design of CMOS Circuits
von: Jha, Niraj K., et al.

Algorithms for Synthesis and Testing of Asynchronous Circuits
von: Lavagno, Luciano, 1959-, et al.

VLSI
Veröffentlicht: (2021)

Modeling and Simulation of High Speed VLSI Interconnects : A Special Issue of Analog Integrated Circuits and Signal Processing An International Journal Vol. 5, No. 1 (1994)

Testing the forward modeling approach in asteroseismology
von: S. Charpinet, et al.
Veröffentlicht: (2008)

Testing the forward modeling approach in asteroseismology
von: V. Van Grootel, et al.
Veröffentlicht: (2008)

Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
von: Shen, Ruijing, et al.
Veröffentlicht: (2012)

Hierarchical octree and
von: W. Saftly, et al.
Veröffentlicht: (2014)

Advanced Energetic Materials: Testing and Modeling
Veröffentlicht: (2023)

FET Modeling for Circuit Simulation
von: Divekar, Dileep

Analog Design Issues in Digital VLSI Circuits and Systems : A Special Issue of Analog Integrated Circuits and Signal Processing, An International Journal Volume 14, Nos. 1/2 (1997)

VLSI Design
Veröffentlicht: (2021)

© 2021-2023 • Université d'Orléans, Service Commun de Documentation, 6 rue de Tours, 45072 Orléans cedex 2
+33(0) 2 38 41 71 84 • https://scd.univ-orleans.fr • Mentions légales