Reconfigurable Computing : Accelerating Computation with Field-Programmable Gate Arrays
placedintohardware. Thismethodologyismoste?ectivewhentheapplication shows 90/10 behavior 90% of execution time in 10% of the code. By placing such compute intensive blocks in hardware, the NAPA could achieve 1 2 orders of magnitude performance improvement over DSP processors. TBT System ToggleBus Po...
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| Asıl Yazarlar: | , |
|---|---|
| Materyal Türü: | Livre numérique |
| Dil: | Anglais |
| Baskı/Yayın Bilgisi: |
New York, NY :
Springer US : Imprint: Springer
[20..].
Cham : Springer Nature |
| Online Erişim: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Not: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Reconfigurable computing, accelerating computation with field-programmable gate arrays, Maya B. Gokhale, 1. Ed., Berlin, Springer US, 2005, (1 vol.) X-238 p., 0-387-26105-2 |