Symbolic analysis and reduction of VLSI circuits
The IC industry, including digital and analog circuit design houses, electrical design automation software vendors, library and IP providers, and foundries all face grand challenges in designing nanometer VLSI systems. The design productivity gap between nanometer VLSI technologies and today s desig...
সংরক্ষণ করুন:
| প্রধান লেখক: | , , |
|---|---|
| বিন্যাস: | Livre numérique |
| ভাষা: | Anglais |
| প্রকাশিত: |
New York, NY :
Springer US
2005.
Cham : Springer Nature |
| অনলাইন ব্যবহার করুন: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| টীকা: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Symbolic Analysis and Reduction of VLSI Circuits, Texte imprimé, 9780387239040 • Symbolic Analysis and Reduction of VLSI Circuits, Texte imprimé, 9780387503943 • Symbolic Analysis and Reduction of VLSI Circuits, Texte imprimé, 9781441936714 |
| LEADER | 03846nam a22003497a 4500 | ||
|---|---|---|---|
| 001 | 947775 | ||
| 008 | 080409s2005 xx ||| |||| 00| 0 eng d | ||
| 009 | PPN123071119 | ||
| 020 | |a 9780387239057 | ||
| 041 | 0 | |a eng | |
| 082 | |a 621.3 | ||
| 100 | 1 | |a Qin, Zhanhai, |d 19..- | |
| 245 | 1 | 0 | |a Symbolic analysis and reduction of VLSI circuits |c by Zhanhai Qin, Sheldon X. D. Tan, Chung-Kuan Cheng. |
| 260 | |a New York, NY : |b Springer US. | ||
| 260 | |a Cham : |b Springer Nature, |c 2005. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 0 | |a Fundamentals -- Basics Of Circuit Analysis -- Linear VLSI Circuits -- Model-Order Reduction -- Generalized Y-? Transformation - Fundamental Theory -- Generalized Y-? Transformation - Advance Topics -- Y-? Transformation: Application I - Model Stabilization -- Y-? Transformation: Application II - Realizable Parasitic Reduction -- Analog VLSI Circuits -- Topological Analysis of Passive Networks -- Exact Symbolic Analysis Using Determinant Decision Diagrams -- S-Expanded Determinant Decision Diagrams for Symbolic Analysis -- DDD Based Approximation for Analog Behavioral Modeling -- Hierarchical Symbolic Analysis and Hierarchical Model Order Reduction. | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a The IC industry, including digital and analog circuit design houses, electrical design automation software vendors, library and IP providers, and foundries all face grand challenges in designing nanometer VLSI systems. The design productivity gap between nanometer VLSI technologies and today s design capabilities mainly comes from the exponentially growing complexity of VLSI systems due to relentless pushing for integration. The physical effects on the performance and reliability of these systems are becoming more pronounced. Efficient modeling and reduction of both the passive and active circuits is essential for hierarchical and IP-based reuse design paradigms. Symbolic Analysis and Reducation of VLSI Circuits presents the symbolic approach to the modeling and reduction of both the passive parasitic linear networks and active analog circuits. It reviews classic symbolic analysis methods and presents state-of-art developments for interconnect reduction and the behavioral modeling of active analog circuits. The text includes the most updated discoveries such as Y-Delta transformation and DDD-graph symbolic representation which allow analysis and modeling of much larger circuitry than ever before | ||
| 700 | 1 | |a Cheng, Chung-Kuan. |4 aut | |
| 700 | 1 | |a Tan, Sheldon X.-D. |4 aut | |
| 776 | 0 | |t Symbolic Analysis and Reduction of VLSI Circuits |b Texte imprimé |z 9780387239040 | |
| 776 | 0 | |t Symbolic Analysis and Reduction of VLSI Circuits |b Texte imprimé |z 9780387503943 | |
| 776 | 0 | |t Symbolic Analysis and Reduction of VLSI Circuits |b Texte imprimé |z 9781441936714 | |
| 856 | 4 | |q PDF |u https://doi.org/10.1007/b103124 |z Accès sur la plateforme de l'éditeur | |
| 856 | 4 | |u https://revue-sommaire.istex.fr/ark:/67375/8Q1-JB7N0SGJ-5 |z Accès sur la plateforme Istex | |
| 856 | 4 | |5 452349901:748049134 |u https://ezproxy.univ-orleans.fr/login?url=https://dx.doi.org/10.1007/b103124 |z Accès Université d'Orléans | |
| 856 | 4 | |5 180339901:751500348 |u https://ezproxy.insa-cvl.fr/login?qurl=https://dx.doi.org/10.1007/b103124 |z Accès INSA CVL | |
| 997 | |0 947775 |1 Livre numérique |a Ressource numérique |b INSA |b ENSA |c 0/Bibliothèque numérique/ |c 1/Bibliothèque numérique/Autre ressource numérique/ | ||