Constraining Designs for Synthesis and Timing Analysis : A Practical Guide to Synopsys Design Constraints (SDC)

This book serves as a hands-on guide to timing constraints in integrated circuit design.  Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly.  Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis...

詳細記述

保存先:
書誌詳細
主要な著者: Gangadharan, Sridhar, Churiwala, Sanjay (著者)
フォーマット: Livre numérique
言語:Anglais
出版事項: New York, NY : Springer New York 2013.
Cham : Springer Nature
オンライン・アクセス:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
注記: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Constraining Designs for Synthesis and Timing Analysis, Texte imprimé, 9781461432685
• Constraining Designs for Synthesis and Timing Analysis, Texte imprimé, 9781461432708
• Constraining Designs for Synthesis and Timing Analysis, Texte imprimé, 9781489989161

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