Electromigration modeling at circuit layout level
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has...
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| Hlavní autoři: | , |
|---|---|
| Médium: | Livre numérique |
| Jazyk: | Anglais |
| Vydáno: |
Singapore :
Springer Nature Singapore
[20..].
Cham : Springer Nature |
| Vydání: | 1st ed. 2013. |
| Edice: | SpringerBriefs in Reliability
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| On-line přístup: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Poznámka: |
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| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Electromigration Modeling at Circuit Layout Level, Texte imprimé, 9789814451222 • Electromigration modeling at circuit layout level, Cher Ming Tan, Feifei He, Singapore, Springer, 2013, 1 vol. (x-103 p.), SpringerBriefs in applied sciences and technology, 978-981-445120-8 |