Electromigration modeling at circuit layout level
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has...
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| Hauptverfasser: | , |
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| Format: | Livre numérique |
| Sprache: | Anglais |
| Veröffentlicht: |
Singapore :
Springer Nature Singapore
[20..].
Cham : Springer Nature |
| Ausgabe: | 1st ed. 2013. |
| Schriftenreihe: | SpringerBriefs in Reliability
|
| Online Zugang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
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| Edition sous un autre format: | • Electromigration Modeling at Circuit Layout Level, Texte imprimé, 9789814451222 • Electromigration modeling at circuit layout level, Cher Ming Tan, Feifei He, Singapore, Springer, 2013, 1 vol. (x-103 p.), SpringerBriefs in applied sciences and technology, 978-981-445120-8 |
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| 100 | 1 | |a Tan, Cher Ming, |d 1959- | |
| 245 | 1 | 0 | |a Electromigration modeling at circuit layout level |c by Cher Ming Tan, Feifei He. |
| 250 | |a 1st ed. 2013. | ||
| 260 | |a Singapore : |b Springer Nature Singapore. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
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| 505 | 1 | |a Introduction 3D Circuit Model Construction and Simulation Comparison of EM Performance in Circuit Structure and Test Structure Interconnect EM Reliability Modeling at Circuit Layout Level Conclusion | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level. | ||
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| 776 | 0 | |0 174868421 |t Electromigration modeling at circuit layout level |f Cher Ming Tan, Feifei He |c Singapore |n Springer |d 2013 |p 1 vol. (x-103 p.) |s SpringerBriefs in applied sciences and technology |z 978-981-445120-8 | |
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