3D video coding for embedded devices : energy efficient algorithms and architectures
This book shows readers how to develop energy-efficient algorithms and hardware architectures to enable high-definition 3D video coding on resource-constrained embedded devices. Users of the Multiview Video Coding (MVC) standard face the challenge of exploiting its 3D video-specific coding tools fo...
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| Hoofdauteurs: | , , , |
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| Formaat: | Livre numérique |
| Taal: | Anglais |
| Gepubliceerd in: |
New York, NY :
Springer New York
2013.
Cham : Springer Nature |
| Online toegang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Opmerking: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • 3D Video Coding for Embedded Devices, Texte imprimé, 9781461467588 • 3D Video Coding for Embedded Devices, Texte imprimé, 9781461467601 • 3D Video Coding for Embedded Devices, Texte imprimé, 9781493955084 |
| Samenvatting: | This book shows readers how to develop energy-efficient algorithms and hardware architectures to enable high-definition 3D video coding on resource-constrained embedded devices. Users of the Multiview Video Coding (MVC) standard face the challenge of exploiting its 3D video-specific coding tools for increasing compression efficiency at the cost of increasing computational complexity and, consequently, the energy consumption. This book enables readers to reduce the multiview video coding energy consumption through jointly considering the algorithmic and architectural levels. Coverage includes an introduction to 3D videos and an extensive discussion of the current state-of-the-art of 3D video coding, as well as energy-efficient algorithms for 3D video coding and energy-efficient hardware architecture for 3D video coding. · Discusses challenges related to performance and power in 3D video coding for embedded devices; · Describes energy-efficient algorithms for reducing computational complexity at multiple hierarchical levels; · Presents energy-efficient hardware architectures along with methods for reducing on-chip and off-chip energy related to both data processing and memory access; · Shows how to leverage jointly the algorithm and hardware architecture layers of the system. |
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| Beschrijving item: | Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| ISBN: | 9781461467595 |
| Toegang: | Accès en ligne pour les établissements français bénéficiaires des licences nationales Accès soumis à abonnement pour tout autre établissement Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 |