Variation-aware adaptive voltage scaling for sigital CMOS circuits
Increasing performance demands in integrated circuits, together with limited energy budgets, force IC designers to find new ways of saving power. One innovative way is the presented adaptive voltage scaling scheme, which tunes the supply voltage according to the present process, voltage and temperat...
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| Autor principal: | |
|---|---|
| Formato: | Livre numérique |
| Idioma: | Anglais |
| Publicado em: |
Dordrecht :
Springer Netherlands
2013.
Cham : Springer Nature |
| Colecção: | Springer Series in Advanced Microelectronics
41 |
| Acesso em linha: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits, Texte imprimé, 9789400761957 • Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits, Texte imprimé, 9789400761971 • Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits, Texte imprimé, 9789401783675 |
Sumário:
- 1 Introduction
- 2 Sources of Variation
- 3 Related Work
- 4 Adaptive Voltage Scaling by In-situ Delay Monitoring
- 5 Design of In-situ Delay Monitors
- 6 Modeling the AVS Control Loop
- 7 Evaluation of the Pre-Error AVS Approach
- 8 Conclusion
- A Appendix
- A.1 Mathematical Derivation: Path Delay under Local Variations
- A.2 2-D DCT Transform
- References.