Jespers, P. G. (2010). The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits: The semi-empirical and compact model approaches. Springer US.
Цитирование в стиле Чикаго (17-е изд.)Jespers, Paul G.A. The Gm/ID Methodology, a Sizing Tool for Low-voltage Analog CMOS Circuits: The Semi-empirical and Compact Model Approaches. New York, NY: Springer US, 2010.
Цитирование MLA (8-е изд.)Jespers, Paul G.A. The Gm/ID Methodology, a Sizing Tool for Low-voltage Analog CMOS Circuits: The Semi-empirical and Compact Model Approaches. Springer US, 2010.
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