The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits : The semi-empirical and compact model approaches
How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The r...
Enregistré dans:
| Hovedforfatter: | |
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| Format: | Livre numérique |
| Sprog: | Anglais |
| Udgivet: |
New York, NY :
Springer US
2010.
Cham : Springer Nature |
| Serier: | Analog Circuits and Signal Processing
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| Online adgang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
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Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits, the semi-empirical and compact model approaches, by Paul G.A. Jespers,..., Dordrecht, Springer, 2010, 1 volume (XVI-171 p.), Analog circuits and signal processing, 978-0-387-47100-6 • The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits, Texte imprimé, 9780387564388 • The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits, Texte imprimé, 9781461425052 |