Pipelined ADC Design and Enhancement Techniques
Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs. Written for both rese...
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| التنسيق: | Livre numérique |
| اللغة: | Anglais |
| منشور في: |
Dordrecht :
Springer Netherlands
[20..].
Cham : Springer Nature |
| الطبعة: | 1st ed. 2010. |
| سلاسل: | Analog Circuits and Signal Processing
|
| الوصول للمادة أونلاين: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| ملاحظة: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789048186518 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789048186693 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789048186518 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789400731790 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789048186693 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789048186518 • Pipelined ADC Design and Enhancement Techniques, Texte imprimé, 9789400731790 |
| الملخص: | Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs. Written for both researchers and professionals, Pipelined ADC Design and Enhancement Techniques provides: i.) A tutorial discussion, for those new to pipelined ADCs, of the basic design and tradeoffs involved in designing a pipelined ADC ii.) A detailed discussion of four novel silicon tested pipelined ADC topologies geared towards those looking to gain insight into state-of-the-art design in the area. The ADCs detailed include: - An 11-bit 45MS/s ADC which rapidly digitally calibrates in the background both DAC and gain errors - A 10-bit ADC with power scalable between 50MS/s (35mW) to 1kS/s (15 W) - A 10-bit ADC for use in sub-sampled systems with a technique to eliminate the front-end sample-and-hold - A 10-bit, 50MS/s ADC which uses a capacitive charge pump based approach to enable a very small power consumption of 9.9mW |
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| وصف المادة: | Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| ردمك: | 9789048186525 |
| تدمد: | 2197-1854 |
| وصول: | Accès en ligne pour les établissements français bénéficiaires des licences nationales Accès soumis à abonnement pour tout autre établissement Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 |