Minimizing and Exploiting Leakage in VLSI Design :: SCD d'Orléans

Minimizing and Exploiting Leakage in VLSI Design

Minimizing and Exploiting Leakage in VLSI Design

Minimizing and Exploiting Leakage in VLSI Design Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati and Sunil P. Khatri Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the incre...

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Bibliographische Detailangaben
Hauptverfasser:	Jayakumar, Nikhil, Paul, Suganth (VerfasserIn), Garg, Rajesh (VerfasserIn), Gulati, Kanupriya (VerfasserIn), Khatri, Sunil P. (VerfasserIn)
Format:	Livre numérique
Sprache:	Anglais
Veröffentlicht:	New York, NY : Springer US 2010. Cham : Springer Nature
Online Zugang:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Anmerkung:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Minimizing and Exploiting Leakage in VLSI Design, Texte imprimé, 9781441909497 • Minimizing and Exploiting Leakage in VLSI Design, Texte imprimé, 9781441909510 • Minimizing and Exploiting Leakage in VLSI Design, Texte imprimé, 9781489985293

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