On and off-chip Crosstalk avoidance in VLSI Design
On- and Off-Chip Crosstalk Avoidance in VLSI Design Chunjie Duan, Brock J. LaMeres and Sunil P. Khatri Deep Submicron (DSM) processes present many challenges to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is inter-wire crosstalk within on- and off-chip bus t...
Guardat en:
| Autors principals: | , , |
|---|---|
| Format: | Livre numérique |
| Idioma: | Anglais |
| Publicat: |
New York, NY :
Springer US
2010.
Cham : Springer Nature |
| Accés en línia: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • On and Off-Chip Crosstalk Avoidance in VLSI Design, Texte imprimé, 9781441909466 • On and Off-Chip Crosstalk Avoidance in VLSI Design, Texte imprimé, 9781441909480 • On and Off-Chip Crosstalk Avoidance in VLSI Design, Texte imprimé, 9781489983275 |
Taula de continguts:
- On-Chip Crosstalk and Avoidance
- of On-Chip Crosstalk Avoidance
- Preliminaries to On-chip Crosstalk
- Memoryless Crosstalk Avoidance Codes
- CODEC Designs for Memoryless Crosstalk Avoidance Codes
- Memory-based Crosstalk Avoidance Codes
- Multi-valued Logic Crosstalk Avoidance Codes
- Summary of On-Chip Crosstalk Avoidance
- Off-Chip Crosstalk and Avoidance
- to Off-Chip Crosstalk
- Package Construction and Electrical Modeling
- Preliminaries and Terminology
- Analytical Model for Off-Chip Bus Performance
- Optimal Bus Sizing
- Bus Expansion Encoder
- Bus Stuttering Encoder
- Impedance Compensation
- Future Trends and Applications
- Summary of Off-Chip Crosstalk Avoidance.