Analysis and design of resilient VLSI circuits : :: SCD d'Orléans

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations

This book is motivated by the challenges faced in designing reliable integratedsystems using modern VLSI processes. The reliable operation of Integrated Circuits (ICs) has become increasingly difficult to achieve in the deep sub-micron (DSM) era. With continuously decreasing device feature sizes, co...

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Bibliografische gegevens
Hoofdauteurs:	Garg, Rajesh, Khatri, Sunil P. (Auteur)
Formaat:	Livre numérique
Taal:	Anglais
Gepubliceerd in:	New York, NY : Springer US 2010. Cham : Springer Nature
Online toegang:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Opmerking:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Analysis and Design of Resilient VLSI Circuits, Texte imprimé, 9781441909305 • Analysis and Design of Resilient VLSI Circuits, Texte imprimé, 9781441909329 • Analysis and Design of Resilient VLSI Circuits, Texte imprimé, 9781489985101

Gelijkaardige items

Minimizing and Exploiting Leakage in VLSI Design
door: Jayakumar, Nikhil, et al.
Gepubliceerd in: (2010)

Circuit Design for CMOS VLSI
door: Uyemura, John P.

Design of VLSI Circuits : Based on VENUS
door: Hörbst, Egon, 1941-, et al.

Computer Design Aids for VLSI Circuits

On and off-chip Crosstalk avoidance in VLSI Design
door: Duan, Chunjie, et al.
Gepubliceerd in: (2010)

Asynchronous Circuit Design for VLSI Signal Processing

High-Performance Digital VLSI Circuit Design
door: Gu, Richard X., et al.

Principles of VLSI RTL Design : A Practical Guide
door: Churiwala, Sanjay, et al.
Gepubliceerd in: (2011)

Symbolic analysis and reduction of VLSI circuits
door: Qin, Zhanhai, 19..-, et al.
Gepubliceerd in: (2005)

Conception des circuits VLSI : du composant au système
door: Anceau, François, 1940-2020, informaticien, et al.
Gepubliceerd in: (2007)

VLSI Design
Gepubliceerd in: (2021)

VLSI Design
Gepubliceerd in: (2026)

Interconnection Noise in VLSI Circuits
door: Moll, Francesc, et al.

Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
door: Michael, Christopher, et al.

Process and Device Simulation for MOS-VLSI Circuits

Hierarchical Modeling for VLSI Circuit Testing
door: Bhattacharya, Debashis, et al.

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics
door: Khatri, Sunil P., et al.

Routing congestion in VLSI circuits : estimation and optimization
door: Saxena, Prashant, et al.
Gepubliceerd in: (2007)

Power-constrained Testing of VLSI Circuits
door: Nicolici, Nicola, 19..-, et al.

Delay Fault Testing for VLSI Circuits
door: Krstić, Angela, et al.

The Bounding Approach to VLSI Circuit Simulation
door: Zukowski, Charles A.

Relaxation Techniques for the Simulation of VLSI Circuits
door: White, Jacob K., et al.

Interconnects in VLSI Design

Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip
door: Onabajo, Marvin, 19..-, et al.
Gepubliceerd in: (2012)

Low-Power Digital VLSI Design : Circuits and Systems
door: Bellaouar, Abdellatif, et al.

Mixed Signal VLSI Wireless Design : Circuits and Systems
door: Farag, Emad N., et al.

MOSFET Models for VLSI Circuit Simulation : Theory and Practice
door: Arora, Narain, 1943-

Analog Design Issues in Digital VLSI Circuits and Systems : A Special Issue of Analog Integrated Circuits and Signal Processing, An International Journal Volume 14, Nos. 1/2 (1997)

Hot-Carrier Reliability of MOS VLSI Circuits
door: Leblebici, Yusuf, 19..-...., informaticien, et al.

VLSI Design : A Practical Guide for FPGA and ASIC Implementations
door: Chandrasetty, Vikram Arkalgud
Gepubliceerd in: (2011)

VLSI Memory Chip Design
door: Itoh, Kiyoo

Reuse Techniques for VLSI Design

VLSI Design of Neural Networks

Trace theory and VLSI design
door: Van de Snepscheut, Jan L. A., 1953-1994

Simulated Annealing for VLSI Design
door: Wong, D. F., et al.

VLSI : circuits for emerging applications
door: Wojcicki, Tomasz
Gepubliceerd in: (2015)

Switch-Level Timing Simulation of MOS VLSI Circuits
door: Rao, Vasant B., et al.

Algorithms for VLSI Physical Design Automation
door: Sherwani, Naveed A.

Algorithms for VLSI Physical Design Automation
door: Sherwani, Naveed A.

Multi-Level Simulation for VLSI Design
door: Hill, Dwight D., et al.

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