Fundamentals of III-V Semiconductor MOSFETs

Fundamentals of III-V Semiconductor MOSFETs presents the fundamentals and current status of research of compound semiconductor metal-oxide-semiconductor field-effect transistors (MOSFETs) that are envisioned as a future replacement of silicon in digital circuits. The material covered begins with a r...

Disgrifiad llawn

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Awduron Eraill: Oktyabrsky, Serge (Cyfarwyddwr cyhoeddi), Ye, Peide D. (Cyfarwyddwr cyhoeddi)
Fformat: Livre numérique
Iaith:Anglais
Cyhoeddwyd: New York, NY : Springer US : Imprint: Springer [20..].
Cham : Springer Nature
Rhifyn:1.
Mynediad Ar-lein:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Nodyn: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Fundamentals of III-V semiconductor MOSFETs, Serge Oktyabrsky, Peide Ye, editors, New York, Springer, 2010, 1 vol. (XV-445 p.), 978-1-441-91546-7
Tabl Cynhwysion:
  • Non-Silicon MOSFET Technology: A Long Time Coming Properties and Trade-Offs of Compound Semiconductor MOSFETs Device Physics and Performance Potential of III-V Field-Effect Transistors Theory of HfO2-Based High-k Dielectric Gate Stacks Density Functional Theory Simulations of High-k Oxides on III-V Semiconductors Interfacial Chemistry of Oxides on III-V Compound Semiconductors Atomic-Layer Deposited High-k/III-V Metal-Oxide-Semiconductor Devices and Correlated Empirical Model Materials and Technologies for III-V MOSFETs InGaAs, Ge, and GaN Metal-Oxide-Semiconductor Devices with High-k Dielectrics for Science and Technology Beyond Si CMOS Sub-100 nm Gate III-V MOSFET for Digital Applications Electrical and Material Characteristics of Hafnium Oxide with Silicon Interface Passivation on III-V Substrate for Future Scaled CMOS Technology p-type Channel Field-Effect Transistors Insulated Gate Nitride-Based Field Effect Transistors Technology/Circuit Co-Design for III-V FETs