Low-Power High-Level Synthesis for Nanoscale CMOS Circuits.
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) r...
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| المؤلفون الرئيسيون: | , , , |
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| مؤلف مشترك: | |
| التنسيق: | Livre numérique |
| اللغة: | Anglais |
| منشور في: |
New York, NY :
Springer US : Imprint: Springer
[20..].
Cham : Springer Nature |
| الوصول للمادة أونلاين: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
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Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low-Power High-Level Synthesis for Nanoscale CMOS Circuits, Texte imprimé, 9780387764733 |
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| 100 | 1 | |a Patra, Priyardarsan. | |
| 245 | 1 | 0 | |a Low-Power High-Level Synthesis for Nanoscale CMOS Circuits. |
| 260 | |a New York, NY : |b Springer US : |b Imprint: Springer. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 1 | |a High-Level Synthesis Fundamentals Power Modeling and Estimation at Transistor and Logic Gate Levels Architectural Power Modeling and Estimation Power Reduction Fundamentals Energy or Average Power Reduction Peak Power Reduction Transient Power Reduction Leakage Power Reduction Conclusions and Future Direction | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level. At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation. The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented including: Power Reduction Fundamentals Energy or Average Power Reduction Peak Power Reduction Transient Power Reduction Leakage Power Reduction Low-Power High-Level Synthesis for Nanoscale CMOS Circuits provides a valuable resource for the design of low-power CMOS circuits | ||
| 700 | 1 | |a Kougianos, Elias. |4 aut | |
| 700 | 1 | |a Ranganathan, Nagarajan. |4 aut | |
| 700 | 1 | |a Mohanty, Saraju P. |4 aut | |
| 710 | 2 | |a Patra. |4 aut | |
| 776 | 0 | |t Low-Power High-Level Synthesis for Nanoscale CMOS Circuits |b Texte imprimé |z 9780387764733 | |
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| 997 | |0 940445 |1 Livre numérique |a Ressource numérique |b INSA |b ENSA |c 0/Bibliothèque numérique/ |c 1/Bibliothèque numérique/Autre ressource numérique/ | ||