Integrated system-level modeling of network-on-chip enabled multi-processor platforms
We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is req...
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| Auteurs principaux: | , , |
|---|---|
| Format: | Livre numérique |
| Langue: | Anglais |
| Publié: |
Dordrecht :
Springer Netherlands
[20..].
Cham : Springer Nature |
| Accès en ligne: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Note: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Integrated system-level modeling of network-on-chip enabled multi-processor platforms, Tim Kogel, Rainer Leupers, Heinrich Meyr, Dordrecht, Springer, 2006, 1 vol. (xiv-199 p.), 1-402-04825-4 |