Integrated system-level modeling of network-on-chip enabled multi-processor platforms
We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is req...
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| Główni autorzy: | , , |
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| Format: | Livre numérique |
| Język: | Anglais |
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Dordrecht :
Springer Netherlands
[20..].
Cham : Springer Nature |
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| Edition sous un autre format: | • Integrated system-level modeling of network-on-chip enabled multi-processor platforms, Tim Kogel, Rainer Leupers, Heinrich Meyr, Dordrecht, Springer, 2006, 1 vol. (xiv-199 p.), 1-402-04825-4 |
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| 100 | 1 | |a Kogel, Tim. | |
| 245 | 1 | 0 | |a Integrated system-level modeling of network-on-chip enabled multi-processor platforms |c by Tim Kogel, Rainer Leupers, Heinrich Meyr. |
| 260 | |a Dordrecht : |b Springer Netherlands. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 1 | |a Foreword. Preface 1. Introduction 2. Embedded SOC Applications 3. Classification of Platform Elements 4. System Level Design Principles 5. Related Work 6. Methodology Overview 7. Unified Timing Model 8. MP-SOC Simulation Framework 9. Case Study 10. Summary Appendices. A: The OSCI TLM Standard. B: The OCPIP TL3 Channel. C: The Architects View Framework List of Figures. List of Tables. References Index | |
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| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is required to cope with the rapidly increasing design costs. While the present paradigm change shares the move to a higher level of abstraction with all previous ones, there exists also a key difference. For the ?rst time shrinking geometries do not leadtoacorrespondingincreaseofperformance. InarecenttalkLisaSuofIBM pointed out that in 65nm technology only about 25% of performance increase can be attributed to scaling geometries while the lion share is due to innovative processor architecture [1]. We believe that this fact will revolutionize the entire semiconductor industry. What is the reason for the end of the traditional view of Moore s law? It is instructive to look at the major drivers of the semiconductor industry: wireless communications and multimedia. Both areas are characterized by a rapidly increasingdemandofcomputationalpowerinordertoprocessthesophisticated algorithmsnecessarytooptimallyutilizethepreciousresourcebandwidth. The computational power cannot be provided by traditional processor architectures and shared bus type of interconnects. The simple reason for this fact is energy ef?ciency: there exist orders of magnitude between the energy ef?ciency of an algorithm implemented as a ?xed functionality computational element and of a software implementation on a processor | ||
| 700 | 1 | |a Leupers, Rainer, |d 19..- |4 aut | |
| 700 | 1 | |a Meyr, Heinrich. |4 aut | |
| 776 | 0 | |0 116697172 |t Integrated system-level modeling of network-on-chip enabled multi-processor platforms |f Tim Kogel, Rainer Leupers, Heinrich Meyr |c Dordrecht |n Springer |d 2006 |p 1 vol. (xiv-199 p.) |z 1-402-04825-4 | |
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