SystemVerilog for design : a guide to using SystemVerilog for hardware design and modeling
"SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test pr...
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| Autors principals: | , , |
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| Format: | Livre numérique |
| Idioma: | Anglais |
| Publicat: |
New York :
Springer US : Imprint: Springer
[20..].
Cham : Springer Nature |
| Edició: | Second edition. |
| Col·lecció: | Engineering Springer-11647; ZDB-2-ENG
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| Matèries: | |
| Accés en línia: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Database machines, proceedings, sixth International workshop, IWDM '89, Deauville, France, June 19-21, 1989, Berlin, Springer-Verlag, 1989, 1 vol. (VI-386 p.), Lecture notes in computer science, 3-540-51324-8 • SystemVerilog for design, Second edition, 9781441941251 • SystemVerilog for design, Second edition, 9780387333991 |