Field-programmable logic and applications : 14th International Conference, FPL 2004, Antwerp, Belgium, August 30-September 1, 2004 : proceedings

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Prif Awdur: Becker, Jürgen, 1929-
Awdur Corfforaethol: International Conference on Field-Programmable Logic and Applications (Awdur)
Awduron Eraill: Platzner, Marco (Cyfarwyddwr cyhoeddi), Vernalde, Serge (Cyfarwyddwr cyhoeddi)
Fformat: Livre numérique
Iaith:Anglais
Cyhoeddwyd: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Cyfres:Lecture notes in computer science 3203
Pynciau:
Mynediad Ar-lein:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Nodyn: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Field-programmable logic and applications, 14th International Conference, FPL 2004, Antwerp, Belgium, August 30-September 1, 2004, proceedings, Jürgen Becker, Marco Platzner, Serge Vernalde (eds.), Berlin, Springer, 2004, 1 vol. (XXIX-1198 p.), Lecture notes in computer science, 3-540-22989-2
• Field Programmable Logic and Application, Texte imprimé, 9783662190968
Tabl Cynhwysion:
  • Plenary Keynotes
  • Organic and Biology Computing
  • Security and Cryptography 1
  • Platform Based Design
  • Algorithms and Architectures
  • Acceleration Application 1
  • Architecture 1
  • Physical Design 1
  • Arithmetic 1
  • Multitasking
  • Circuit Technology
  • Memory 1
  • Network Processing
  • Testing
  • Applications
  • Arithmetic 2
  • Signal Processing 1
  • Computational Models and Compiler
  • Dynamic Reconfiguration 1
  • Network and Optimization Algorithms
  • System-on-Chip 1
  • High Speed Design
  • Security and Cryptography 2
  • Architectures 2
  • Memory 2
  • Image Processing 1
  • Network-on-Chip
  • Power Aware Design 1
  • IP-Based Design
  • Power Aware Design 2
  • Coprocessing Architectures
  • Embedded Tutorials
  • Dynamic Reconfiguration 2
  • Physical Design 2
  • Acceleration Application 2
  • System Level Design
  • Physical Interconnect
  • Computational Models
  • Acceleration Applications 3
  • Arithmetic 3
  • Signal Processing 2
  • System-on-Chip 2
  • Image Processing 2
  • Cryptography and Compression
  • Network Applications and Architectures
  • Network on Chip and Adaptive Architectures
  • Debugging and Test
  • Organic and Biology Computing (Poster)
  • Security and Cryptography (Poster)
  • Mapping and Compilers (Poster)
  • Architectures (Poster)
  • Algorithms and IP (Poster)
  • Image Processing (Poster)
  • PhD Forum (Poster).