Automated technology for verification and analysis : second international conference, ATVA 2004, Taipei, Taiwan, ROC, october 31-november 3, 2004 : proceedings

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Bibliografiska uppgifter
Institutionell upphovsman: International Symposium on Automated Technology on Verification and Analysis :Taipei, TW
Övriga upphovsmän: Wang, Farn (Chefredaktör, huvudredaktör)
Materialtyp: Livre numérique
Språk:Anglais
Publicerad: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Serie:Lecture notes in computer science 3299
Ämnen:
Länkar:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Anmärkning: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Automated technology for verification and analysis, second international conference, ATVA 2004, Taipei, Taiwan, ROC, october 31-november 3, 2004, proceedings, Farn Wang (ed.), Berlin, Springer, 2004, 1 vol. (XII-506 p.), Lecture notes in computer science, 3-540-23610-4
• Automated Technology for Verification and Analysis, Texte imprimé, 9783662191248
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111 2 |a International Symposium on Automated Technology on Verification and Analysis  |n (2  |d  :2004  |c  :Taipei, TW). 
245 1 0 |a Automated technology for verification and analysis :  |b second international conference, ATVA 2004, Taipei, Taiwan, ROC, october 31-november 3, 2004 : proceedings   |c [edited by] Farn Wang. 
260 |a Berlin [etc.] :  |b Springer. 
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490 0 |a Lecture notes in computer science  |v 3299  |x 1611-3349 
500 |a Archives Springer e-books (Licence nationale) 
500 |a Archives Springer e-books (Licence nationale) 
505 0 |a Keynote Speech -- Games for Formal Design and Verification of Reactive Systems -- Evolution of Model Checking into the EDA Industry -- Abstraction Refinement -- Invited Speech -- Tools for Automated Verification of Web Services -- Theorem Proving Languages for Verification -- An Automated Rigorous Review Method for Verifying and Validating Formal Specifications -- Papers -- Toward Unbounded Model Checking for Region Automata -- Search Space Partition and Case Basis Exploration for Reducing Model Checking Complexity -- Synthesising Attacks on Cryptographic Protocols -- Büchi Complementation Made Tighter -- SAT-Based Verification of Safe Petri Nets -- Disjunctive Invariants for Numerical Systems -- Validity Checking for Quantifier-Free First-Order Logic with Equality Using Substitution of Boolean Formulas -- Fair Testing Revisited: A Process-Algebraic Characterisation of Conflicts -- Exploiting Symmetries for Testing Equivalence in the Spi Calculus -- Using Block-Local Atomicity to Detect Stale-Value Concurrency Errors -- Abstraction-Based Model Checking Using Heuristical Refinement -- A Global Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata -- Design and Evaluation of a Symbolic and Abstraction-Based Model Checker -- Component-Wise Instruction-Cache Behavior Prediction -- Validating the Translation of an Industrial Optimizing Compiler -- Composition of Accelerations to Verify Infinite Heterogeneous Systems -- Hybrid System Verification Is Not a Sinecure -- Providing Automated Verification in HOL Using MDGs -- Specification, Abduction, and Proof -- Introducing Structural Dynamic Changes in Petri Nets: Marked-Controlled Reconfigurable Nets -- Typeness for ?-Regular Automata -- Partial Order Reduction for Detecting Safety and Timing Failures of Timed Circuits -- MutationCoverage Estimation for Model Checking -- Modular Model Checking of Software Specifications with Simultaneous Environment Generation -- Rabin Tree and Its Application to Group Key Distribution -- Using Overlay Networks to Improve VoIP Reliability -- Integrity-Enhanced Verification Scheme for Software-Intensive Organizations -- RCGES: Retargetable Code Generation for Embedded Systems -- Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets -- First-Order LTL Model Checking Using MDGs -- Localizing Errors in Counterexample with Iteratively Witness Searching -- Verification of WCDMA Protocols and Implementation -- Efficient Representation of Algebraic Expressions -- Development of RTOS for PLC Using Formal Methods -- Reducing Parametric Automata: A Multimedia Protocol Service Case Study -- Synthesis of State Feedback Controllers for Parameterized Discrete Event Systems -- Solving Box-Pushing Games via Model Checking with Optimizations -- CLP Based Static Property Checking -- A Temporal Assertion Extension to Verilog. 
506 |a Accès en ligne pour les établissements français bénéficiaires des licences nationales 
506 |a Accès soumis à abonnement pour tout autre établissement 
506 |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 
650 |a Génie logiciel 
650 |a Conception assistée par ordinateur 
650 |a Informatique 
650 |a Langages de programmation 
650 |a Réseaux d'ordinateurs 
650 |a Théorèmes  |x Démonstration automatique 
650 |a Conception technique  |x Informatique 
650 |a Actes de congrès 
700 1 |a Wang, Farn.  |4 pbd 
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