Software and compilers for embedded systems : 8th international workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004 : proceedings
This volume contains the proceedings of the 8th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2004) held in A- terdam, The Netherlands, on September 2 and 3, 2004. Initially, the workshop was referred to as the International Workshop on Code Generation for Emb- ded Sy...
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| Соавтор: | |
|---|---|
| Другие авторы: | |
| Формат: | Livre numérique |
| Язык: | Anglais |
| Опубликовано: |
Berlin [etc.] :
Springer
[20..].
Cham : Springer Nature |
| Серии: | Lecture notes in computer science
3199 |
| Предметы: | |
| Online-ссылка: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Примечание: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Software and compilers for embedded systems, 8th international workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004, proceedings, Henk Schepers (ed.), Berlin, Springer, 2004, 1 vol. (X-258 p.), Lecture notes in computer science, 3-540-23035-1 • Software and Compilers for Embedded Systems, Texte imprimé, 9783662210918 |
Оглавление:
- Invited Talk
- The New Economics of Embedded Systems
- Application Specific (Co)Design
- A Framework for Architectural Description of Embedded System
- Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units
- ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study
- System and Application Synthesis
- Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition
- An Integer Linear Programming Approach to Classify the Communication in Process Networks
- Predictable Embedded Multiprocessor System Design
- Data Flow Analysis
- Suppression of Redundant Operations in Reverse Compiled Code Using Global Dataflow Analysis
- Fast Points-to Analysis for Languages with Structured Types
- Data Partitioning
- An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications
- Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization
- On the Phase Coupling Problem Between Data Memory Layout Generation and Address Pointer Assignment
- Task Scheduling
- Dynamic Mapping and Ordering Tasks of Embedded Real-Time Systems on Multiprocessor Platforms
- Integrated Intra- and Inter-task Cache Analysis for Preemptive Multi-tasking Real-Time Systems
- A Fuzzy Adaptive Algorithm for Fine Grained Cache Paging
- Code Generation
- DSP Code Generation with Optimized Data Word-Length Selection
- Instruction Selection for Compilers That Target Architectures with Echo Instructions
- A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.