Nanoscale memory repair

Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. As a result, repair techniques have been indispensable for nano-scale memories. Without these techniques, even modern MPUs/...

Täydet tiedot

Tallennettuna:
Bibliografiset tiedot
Päätekijät: Horiguchi, Masashi, Itoh, Kiyoo (Tekijä)
Aineistotyyppi: Livre numérique
Kieli:Anglais
Julkaistu: New York, NY : Springer New York 2011.
Cham : Springer Nature
Sarja:Integrated Circuits and Systems
Linkit:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Huomautus: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Nanoscale Memory Repair, Texte imprimé, 9781441979575
• Nanoscale Memory Repair, Texte imprimé, 9781461427940
• Nanoscale Memory Repair, Texte imprimé, 9781441979599
Sisällysluettelo:
  • An Introduction to Repair Techniques: Basics of Redundancy
  • Basics of Error Checking and Correction
  • Comparison between Redundancy and ECC
  • Repairs of Logic Circuits
  • Redundancy: Models of Fault Distribution
  • Yield Improvement through Redundancy
  • Replacement Schemes
  • Intra-Subarray Replacement
  • Inter-Subarray Replacement
  • Subarray Replacement
  • Devices for Storing Addresses
  • Testing for Redundancy
  • Error Checking and Correction: Linear Algebra and Linear Codes
  • Galois Field
  • Error-Correcting Codes
  • Coding and Decoding Circuits
  • Theoretical Reduction in Soft-Error and Hard-Error Rates
  • Application of ECC
  • Testing for ECC
  • Synergistic Effect of Redundancy and ECC: Repair of Bit Faults using Synergistic Effect
  • Application of Synergistic Effect.