Digital system test and testable design : using HDL models and architectures
Digital System Test and Testable Design: Using HDL Models and Architectures by: Zainalabedin Navabi This book is about digital system test and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models a...
保存先:
| 第一著者: | |
|---|---|
| フォーマット: | Livre numérique |
| 言語: | Anglais |
| 出版事項: |
New York, NY :
Springer US
2011.
Cham : Springer Nature |
| オンライン･アクセス: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| 注記: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Digital System Test and Testable Design, Texte imprimé, 9781441975478 • Digital System Test and Testable Design, Texte imprimé, 9781441975492 • Digital System Test and Testable Design, Texte imprimé, 9781489979278 |
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| 008 | 110208s2011 xx ||| |||| 00| 0 eng d | ||
| 009 | PPN149903340 | ||
| 020 | |a 9781441975485 | ||
| 041 | 0 | |a eng | |
| 082 | |a 621.3815 | ||
| 100 | 1 | |a Navabi, Zainalabedin. | |
| 245 | 1 | 0 | |a Digital system test and testable design : |b using HDL models and architectures |c Zainalabedin Navabi. |
| 260 | |a New York, NY : |b Springer US. | ||
| 260 | |a Cham : |b Springer Nature, |c 2011. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Digital System Test and Testable Design: Using HDL Models and Architectures by: Zainalabedin Navabi This book is about digital system test and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques isanother unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware / software environment facilitates description of complex test programs and test strategies. Combines design and test Describes test methods in Verilog and PLI, which makes the methods more understandable and the gates possible to simulate Simulation of gate models allows fault simulation and test generation, while Verilog testbenches inject faults, evaluate fault coverage and apply new test patterns Describes DFT, compression, decompression, and BIST techniques in Verilog, which makes the hardware of the architectures easier to understand and allows simulation and evaluation of the testability methods Virtual testers (Verilog testbenches) play the role of ATEs for driving scan tests and examining the circuit under test Verilog descriptions of scan designs and BIST architectures areavailable that can be used in actual designs PLI test utilities developed in-text are available for download Introductory Video for Verilog basics, software developed in-text, and PLI basics available for download Powerpoint slides available for each chapter. | ||
| 776 | 0 | |t Digital System Test and Testable Design |b Texte imprimé |z 9781441975478 | |
| 776 | 0 | |t Digital System Test and Testable Design |b Texte imprimé |z 9781441975492 | |
| 776 | 0 | |t Digital System Test and Testable Design |b Texte imprimé |z 9781489979278 | |
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| 997 | |0 968155 |1 Livre numérique |a Ressource numérique |b INSA |b ENSA |c 0/Bibliothèque numérique/ |c 1/Bibliothèque numérique/Autre ressource numérique/ | ||