Multiprocessor System-on-Chip : Hardware Design and Tool Integration
Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme c...
שמור ב:
| מחברים אחרים: | , |
|---|---|
| פורמט: | Livre numérique |
| שפה: | Anglais |
| יצא לאור: |
New York, NY :
Springer New York : Imprint: Springer
[20..].
Cham : Springer Nature |
| גישה מקוונת: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
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Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
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| Edition sous un autre format: | • Multiprocessor System-on-Chip, Hardware Design and Tool Integration, Michael Hübner, Jürgen Becker, Editors, New York, NY, Springer, 2011, 1 vol. (viii-270 p.), Engineering (Springer-11647), 978-1-4419-6459-5 |
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| 245 | 0 | 0 | |a Multiprocessor System-on-Chip : |b Hardware Design and Tool Integration |c edited by Michael Hübner, Jürgen Becker. |
| 260 | |a New York, NY : |b Springer New York : |b Imprint: Springer. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
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| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. Provides a state-of-the-art overview of system design using MPSoC architectures; Describes current trends in on-chip communication architectures; Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; Includes coverage of challenges in physical design for multi- and manycore hardware architectures | ||
| 700 | 1 | |a Hubner, Michael. |4 pbd | |
| 700 | 1 | |a Becker, Jürgen. |4 pbd | |
| 776 | 0 | |0 157571998 |t Multiprocessor System-on-Chip |o Hardware Design and Tool Integration |f Michael Hübner, Jürgen Becker, Editors |c New York, NY |n Springer |d 2011 |p 1 vol. (viii-270 p.) |s Engineering (Springer-11647) |z 978-1-4419-6459-5 | |
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