Low-power high-resolution analog to digital converters : design, test and calibration
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D...
Enregistré dans:
| Auteurs principaux: | , |
|---|---|
| Format: | Livre numérique |
| Sprog: | Anglais |
| Udgivet: |
Dordrecht :
Springer Netherlands
2011.
Cham : Springer Nature |
| Serier: | Analog Circuits and Signal Processing
|
| Online adgang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Kommentar: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low-Power High-Resolution Analog to Digital Converters, Texte imprimé, 9789048197248 • Low-Power High-Resolution Analog to Digital Converters, Texte imprimé, 9789048197262 • Low-Power High-Resolution Analog to Digital Converters, Texte imprimé, 9789402405309 |
| LEADER | 04448nam a22003497a 4500 | ||
|---|---|---|---|
| 001 | 967922 | ||
| 008 | 110106s2011 xx ||| |||| 00| 0 eng d | ||
| 009 | PPN14903394X | ||
| 020 | |a 9789048197255 | ||
| 041 | 0 | |a eng | |
| 082 | |a 621.381 | ||
| 100 | 1 | |a Zjajo, Amir. | |
| 245 | 1 | 0 | |a Low-power high-resolution analog to digital converters : |b design, test and calibration |c by Amir Zjajo, José Pineda de Gyvez. |
| 260 | |a Dordrecht : |b Springer Netherlands. | ||
| 260 | |a Cham : |b Springer Nature, |c 2011. | ||
| 490 | 0 | |a Analog Circuits and Signal Processing |x 2197-1854 | |
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 0 | |a Foreword -- Abbrevations.- Symbols -- 1. Introduction -- 2. Analog to Digital Conversion -- 3. Design of Multi-Step A/D Converters -- 4. Multi-Step A/D Converter Testing -- 5. Multi-Step A/D Converter Debugging -- 6. Conclusions and Recommendations -- Appendix -- References -- Index.-. | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurementsfrom the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology. | ||
| 700 | 1 | |a Pineda de Gyvez, José, |c électronicien. |4 aut | |
| 776 | 0 | |t Low-Power High-Resolution Analog to Digital Converters |b Texte imprimé |z 9789048197248 | |
| 776 | 0 | |t Low-Power High-Resolution Analog to Digital Converters |b Texte imprimé |z 9789048197262 | |
| 776 | 0 | |t Low-Power High-Resolution Analog to Digital Converters |b Texte imprimé |z 9789402405309 | |
| 856 | 4 | |q PDF |u https://doi.org/10.1007/978-90-481-9725-5 |z Accès sur la plateforme de l'éditeur | |
| 856 | 4 | |u https://revue-sommaire.istex.fr/ark:/67375/8Q1-J3M1GRX9-H |z Accès sur la plateforme Istex | |
| 856 | 4 | |5 452349901:750626437 |u https://ezproxy.univ-orleans.fr/login?url=https://dx.doi.org/10.1007/978-90-481-9725-5 |z Accès Université d'Orléans | |
| 856 | 4 | |5 180339901:753983648 |u https://ezproxy.insa-cvl.fr/login?qurl=https://dx.doi.org/10.1007/978-90-481-9725-5 |z Accès INSA CVL | |
| 997 | |0 967922 |1 Livre numérique |a Ressource numérique |b INSA |b ENSA |c 0/Bibliothèque numérique/ |c 1/Bibliothèque numérique/Autre ressource numérique/ | ||