Low power networks-on-chip
Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and res...
Guardat en:
| Altres autors: | Silvano, Cristina (Director editorial), Lajolo, Marcello (Director editorial), Palermo, Gianluca (Director editorial) |
|---|---|
| Format: | Livre numérique |
| Idioma: | Anglais |
| Publicat: |
New York, NY :
Springer US
2011.
Cham : Springer Nature |
| Accés en línia: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low Power Networks-on-Chip, Texte imprimé, 9781441969101 • Low Power Networks-on-Chip, Texte imprimé, 9781441969125 • Low Power Networks-on-Chip, Texte imprimé, 9781489994370 |
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