Analog Layout Synthesis : A Survey of Topological Approaches
Analog Layout Synthesis: A Survey of Topological Approaches Edited by: Helmut E. Graeb Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lac...
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| Κύριος συγγραφέας: | |
|---|---|
| Μορφή: | Livre numérique |
| Γλώσσα: | Anglais |
| Έκδοση: |
New York, NY :
Springer US : Imprint: Springer
[20..].
Cham : Springer Nature |
| Διαθέσιμο Online: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Σημείωση: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Analog Layout Synthesis, Texte imprimé, 9781441969316 |
Πίνακας περιεχομένων:
- Device-level topological placement with symmetry constraints Hierarchical placement with layout constraints Enhanced shape functions for deterministic analog placement Free-Shape Routing for Analog and RF circuits Closing the gap between electrical and physical design of analog circuits: the layout-aware solution Analog layout retargeting Template-driven analog layout automation Place and route of analog circuits