Logic Synthesis and Verification Algorithms :: SCD d'Orléans

Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms

Kaydedildi:

Detaylı Bibliyografya
Asıl Yazarlar:	Hachtel, Gary D., 19..-, Somenzi, Fabio (Yazar)
Materyal Türü:	Livre numérique
Dil:	Anglais
Baskı/Yayın Bilgisi:	Cham : Springer International Publishing [20..]. Cham : Springer Nature
Online Erişim:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Not:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Logic Synthesis and Verification Algorithms, 978-0-387-31004-6

Benzer Materyaller

Logic Synthesis and Verification Algorithms
Yazar:: Hachtel, Gary D., 19..-, ve diğerleri

Logic Synthesis and Verification

Logic Minimization Algorithms for VLSI Synthesis
Yazar:: Brayton, Robert King, 1933-, ve diğerleri

Sequential Logic Testing and Verification
Yazar:: Ghosh, Abhijit, 1964-, ve diğerleri

Abstraction refinement for large scale model checking
Yazar:: Wang, Chao, 19..-, ve diğerleri

VLSI Specification, Verification and Synthesis

Lectures on proof verification and approximation algorithms
Yazar:: Mayr, Ernst W., 1950-

Sequential Logic Synthesis
Yazar:: Ashar, Pranav, ve diğerleri

Logic Synthesis and Optimization

Logic Synthesis Using Synopsys®
Yazar:: Kurup, Pran, 19..-, ve diğerleri

Logic Synthesis Using Synopsys®
Yazar:: Kurup, Pran, 19..-, ve diğerleri

Qualité, équité, transparence, vérification et explicabilité des décisions algorithmiques
Yazar:: Abiteboul, Serge
Baskı/Yayın Bilgisi: (2021)

Logic Synthesis for Control Automata
Yazar:: Baranov, Samary

Memory-Based Logic Synthesis
Yazar:: Sasao, Tsutomu

Reversible Logic Synthesis : From Fundamentals to Quantum Computing
Yazar:: Al-Rabadi, Anas N.

Analysis and Synthesis of Logics : How to Cut and Paste Reasoning Systems
Yazar:: Carnielli, Walter Alexandre, 1952-, ve diğerleri

Synthesis and Optimization of DSP Algorithms
Yazar:: Constantinides, George A., ve diğerleri

Hardware specification, verification, and synthesis : mathematical aspects : Mathematical Sciences Institute workshop, Cornell University Ithaca, New York, USA, July 5-7, 1989 : proceedings

La vérification
Yazar:: Granger, Gilles-Gaston, 1920-2016
Baskı/Yayın Bilgisi: (1991)

La Vérification
Yazar:: Granger, Gilles-Gaston, 1920-2016
Baskı/Yayın Bilgisi: (2022)

Logic Synthesis for Asynchronous Controllers and Interfaces
Yazar:: Cortadella, J., ve diğerleri

Fuzzy logic-based algorithms for video de-interlacing
Yazar:: Brox, Piedad, 1979-, ve diğerleri

Finite state machine logic synthesis for complex programmable logic devices
Yazar:: Czerwinski, Robert, ve diğerleri
Baskı/Yayın Bilgisi: (2013)

Deductive verification of object-oriented software : dynamic frames, dynamic logic and predicate abstraction
Yazar:: Weiß, Benjamin
Baskı/Yayın Bilgisi: (2021)

Algorithms and Techniques for VLSI Layout Synthesis
Yazar:: Hill, Dwight, ve diğerleri

Algorithms for Synthesis and Testing of Asynchronous Circuits
Yazar:: Lavagno, Luciano, 1959-, ve diğerleri

Verification Plans : The Five-Day Verification Strategy for Modern Hardware Verification Languages
Yazar:: James, Peet

Logic Synthesis for Low Power VLSI Designs
Yazar:: Iman, Sasan, ve diğerleri

Advanced Techniques in Logic Synthesis, Optimizations and Applications

Logic Program Synthesis from Incomplete Information
Yazar:: Flener, Pierre

Logic Synthesis for Field-Programmable Gate Arrays
Yazar:: Murgai, Rajeev, 1966-, ve diğerleri

Logic synthesis for compositional microprogram control units

Logic Synthesis for FSM-Based Control Units
Yazar:: Barkalov, Alexander, ve diğerleri

Problems in Set Theory, Mathematical Logic and the Theory of Algorithms
Yazar:: Lavrov, Igor, ve diğerleri

Logiques temporelles pour la vérification : expressivité, complexité, algorithmes
Yazar:: Markey, Nicolas, 1976-
Baskı/Yayın Bilgisi: (2003)

Professional Verification : A Guide to Advanced Functional Verification
Yazar:: Wilcox, Paul

VERIFICATION DES PROGRAMMES NORMAUX
Yazar:: Renault, Sophie, 19..-...., docteur en informatique
Baskı/Yayın Bilgisi: (1996)

Logic program synthesis and transformation - Meta-programming in logic : 4th international workshops, LOPSTR '94 and META '94, Pisa, Italy, June 20 21, 1994 : proceedings

Verification by Error Modeling : Using Testing Techniques in Hardware Verification
Yazar:: Radecka, Katarzyna, ve diğerleri

Vérification de logiciels : techniques et outils du model-checking
Yazar:: Bérard, Béatrice, 19..-...., professeure en informatique, ve diğerleri
Baskı/Yayın Bilgisi: (1999)

© 2021-2023 • Université d'Orléans, Service Commun de Documentation, 6 rue de Tours, 45072 Orléans cedex 2
+33(0) 2 38 41 71 84 • https://scd.univ-orleans.fr • Mentions légales