Logic Synthesis for Low Power VLSI Designs :: SCD d'Orléans

Logic Synthesis for Low Power VLSI Designs

Logic Synthesis for Low Power VLSI Designs

Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Prif Awduron:	Iman, Sasan, Pedram, Massoud (Awdur)
Fformat:	Livre numérique
Iaith:	Anglais
Cyhoeddwyd:	Cham : Springer International Publishing [20..]. Cham : Springer Nature
Mynediad Ar-lein:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Nodyn:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Logic Synthesis for Low Power VLSI Designs, 978-1-4613-7490-9

Eitemau Tebyg

Low-Power Digital VLSI Design : Circuits and Systems
gan: Bellaouar, Abdellatif, et al.

Practical Low Power Digital VLSI Design
gan: Yeap, Gary

Logic Minimization Algorithms for VLSI Synthesis
gan: Brayton, Robert King, 1933-, et al.

VLSI Design
Cyhoeddwyd: (2021)

VLSI Design
Cyhoeddwyd: (2026)

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods
gan: Chang, Jui-Ming, et al.

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
gan: Ahuja, Sumit, et al.
Cyhoeddwyd: (2012)

Interconnects in VLSI Design

High-Level VLSI Synthesis

VLSI Specification, Verification and Synthesis

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits
gan: Monteiro, José, et al.

Design of VLSI Circuits : Based on VENUS
gan: Hörbst, Egon, 1941-, et al.

VLSI Design : A Practical Guide for FPGA and ASIC Implementations
gan: Chandrasetty, Vikram Arkalgud
Cyhoeddwyd: (2011)

VLSI Memory Chip Design
gan: Itoh, Kiyoo

Reuse Techniques for VLSI Design

Circuit Design for CMOS VLSI
gan: Uyemura, John P.

VLSI Design of Neural Networks

Trace theory and VLSI design
gan: Van de Snepscheut, Jan L. A., 1953-1994

Simulated Annealing for VLSI Design
gan: Wong, D. F., et al.

Algorithms and Techniques for VLSI Layout Synthesis
gan: Hill, Dwight, et al.

VLSI Synthesis of DSP Kernels : Algorithmic and Architectural Transformations
gan: Mehendale, Manesh, et al.

Optimal VLSI Architectural Synthesis : Area, Performance and Testability
gan: Gebotys, Catherine H., et al.

Low Power Design Methodologies

Low Power Design Essentials
gan: Rabaey, Jan M.
Cyhoeddwyd: (2009)

Power-constrained Testing of VLSI Circuits
gan: Nicolici, Nicola, 19..-, et al.

Algorithms for VLSI Physical Design Automation
gan: Sherwani, Naveed A.

Computer Design Aids for VLSI Circuits

Minimizing and Exploiting Leakage in VLSI Design
gan: Jayakumar, Nikhil, et al.
Cyhoeddwyd: (2010)

Algorithms for VLSI Physical Design Automation
gan: Sherwani, Naveed A.

Multi-Level Simulation for VLSI Design
gan: Hill, Dwight D., et al.

Introduction to Analog VLSI Design Automation

VLSI Design for Manufacturing: Yield Enhancement
gan: Director, Stephen W, 1943-, et al.

Analog Design for CMOS VLSI Systems
gan: Maloberti, Franco, 19..-...., professeur d'électronique

VLSI-design of non-volatile memories
gan: Campardo, Giovanni, 1958-, et al.

Principles of VLSI RTL Design : A Practical Guide
gan: Churiwala, Sanjay, et al.
Cyhoeddwyd: (2011)

Statistical Analysis and Optimization for VLSI: Timing and Power
gan: Srivastava, Ashish, et al.
Cyhoeddwyd: (2005)

Ultra Low-Power Electronics and Design

Low power VCO design in CMOS
gan: Tiebout, Marc
Cyhoeddwyd: (2006)

Low Power Digital CMOS Design
gan: Chandrakasan, Anantha P., 19..-, et al.

Intellectual Property Protection in VLSI Designs : Theory and Practice
gan: Qu, Gang, et al.

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