Error Control for Network-on-Chip Links
As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed t...
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| Principais autores: | , |
|---|---|
| Formato: | Livre numérique |
| Idioma: | Anglais |
| Publicado em: |
New York, NY :
Springer New York
2012.
Cham : Springer Nature |
| Acesso em linha: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Error Control for Network-on-Chip Links, Texte imprimé, 9781441993120 • Error Control for Network-on-Chip Links, Texte imprimé, 9781441993144 • Error Control for Network-on-Chip Links, Texte imprimé, 9781489986337 |
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| 008 | 141128s2012 xx ||| |||| 00| 0 eng d | ||
| 009 | PPN182091082 | ||
| 020 | |a 9781441993137 | ||
| 020 | |a 9781441993137 | ||
| 041 | 0 | |a eng | |
| 082 | |a 621.3815 | ||
| 100 | 1 | |a Fu, Bo. | |
| 245 | 1 | 0 | |a Error Control for Network-on-Chip Links |c by Bo Fu, Paul Ampadu. |
| 260 | |a New York, NY : |b Springer New York. | ||
| 260 | |a Cham : |b Springer Nature, |c 2012. | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 0 | |a Introduction -- Solutions to Improve the Reliability of On-Chip Interconnects -- Networks-on-Chip (NoC) -- Error Control Coding for On-Chip Interconnects -- Energy Efficient Error Control Implementation -- Combining Error Control Codes with Crosstalk Reduction. | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error control methods in on-chip interconnects; Introduces various design techniques to tradeoff the reliability and energy consumption of on-chip interconnects, including implementation of low link swing voltage and dynamic voltage scaling with error control codes, combination of Hamming product codes with type-II hybrid ARQ, and configurable error control codes implementation. . | ||
| 700 | 1 | |a Ampadu, Paul. |4 aut | |
| 776 | 0 | |t Error Control for Network-on-Chip Links |b Texte imprimé |z 9781441993120 | |
| 776 | 0 | |t Error Control for Network-on-Chip Links |b Texte imprimé |z 9781441993144 | |
| 776 | 0 | |t Error Control for Network-on-Chip Links |b Texte imprimé |z 9781489986337 | |
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