Low Power RF Circuit Design in Standard CMOS Technology
Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for...
Gorde:
| Egile Nagusiak: | , , |
|---|---|
| Formatua: | Livre numérique |
| Hizkuntza: | Anglais |
| Argitaratua: |
Berlin, Heidelberg :
Springer Berlin Heidelberg
2012.
Cham : Springer Nature |
| Saila: | Lecture Notes in Electrical Engineering
104 |
| Sarrera elektronikoa: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Oharra: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Low Power RF Circuit Design in Standard CMOS Technology, Texte imprimé, 9783642229862 |
Aurkibidea:
- Introduction Power Considerations in Analog Rf CMOS Circuits Impact of Architecture Selection on RF Front-End Power Consumption Technology Structural Alternatives in Standard CMOS Technologies for Low-Power Analog Design Schematic Design Techniques for Power Saving in RF RF Amplifier Design Mixer Design Phase Locked Loop (PLL) Design