Low Power RF Circuit Design in Standard CMOS Technology :: SCD d'Orléans

Low Power RF Circuit Design in Standard CMOS Technology

Low Power RF Circuit Design in Standard CMOS Technology

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for...

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Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Prif Awduron:	Alvarado, Unai, Bistué, Guillermo (Awdur), Adín, Iñigo (Awdur)
Fformat:	Livre numérique
Iaith:	Anglais
Cyhoeddwyd:	Berlin, Heidelberg : Springer Berlin Heidelberg 2012. Cham : Springer Nature
Cyfres:	Lecture Notes in Electrical Engineering 104
Mynediad Ar-lein:	Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL
Nodyn:	Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale)
Autres localisations:	Voir dans le Sudoc
Edition sous un autre format:	• Low Power RF Circuit Design in Standard CMOS Technology, Texte imprimé, 9783642229862

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Advanced design techniques for RF power amplifiers
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Low Power Analog CMOS for Cardiac Pacemakers : Design and Optimization in Bulk and SOI Technologies
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Power Trade-Offs and Low-Power in Analog CMOS ICs
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