Adiabatic logic : future trend and system level perspective
Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by...
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| التنسيق: | Livre numérique |
| اللغة: | Anglais |
| منشور في: |
Dordrecht :
Springer Netherlands
2012.
Cham : Springer Nature |
| سلاسل: | Springer Series in Advanced Microelectronics
34 |
| الموضوعات: | |
| الوصول للمادة أونلاين: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| ملاحظة: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Adiabatic Logic, Texte imprimé, 9789400737273 • Adiabatic Logic, Texte imprimé, 9789400723443 • Adiabatic Logic, Texte imprimé, 9789400723467 |
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| 100 | 1 | |a Teichmann, Philip. | |
| 245 | 1 | 0 | |a Adiabatic logic : |b future trend and system level perspective |c by Philip Teichmann. |
| 260 | |a Dordrecht : |b Springer Netherlands. | ||
| 260 | |a Cham : |b Springer Nature, |c 2012. | ||
| 490 | 0 | |a Springer Series in Advanced Microelectronics |v 34 |x 2197-6643 | |
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| 500 | |a Archives Springer e-books (Licence nationale) | ||
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| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the power-clock is by means of the synchronous 2N2P LC oscillator, which is also robust with respect to pattern-induced capacitive variations. An easy to implement but powerful power-clock gating supplement is proposed by gating the synchronization signals. Diverse implementations to shut down the system are presented and rated for their applicability and other aspects like energy reduction capability and data retention. Advantageous usage of adiabatic logic requires compact and efficient arithmetic structures. A broad variety of adder structures and a Coordinate Rotation Digital Computer are compared and rated according to energy consumption and area usage, and the resulting energy saving potential against static CMOS proves the ultra-low-power capability of adiabatic logic. In the end, a new circuit topology has to compete with static CMOS also in productivity. On a 130nm test chip, a large scale test vehicle containing an FIR filter was implemented in adiabatic logic, utilizing a standard, library-based design flow, fabricated, measured and compared to simulations of a static CMOS counterpart, with measured saving factors compliant to the values gained by simulation. This leads to the conclusion that adiabatic logic is ready for productive design due to compatibility not only to CMOS technology, but also to electronic design automation (EDA) tools developed for static CMOS system design. | ||
| 650 | |a Structure logique | ||
| 650 | |a Invariants adiabatiques | ||
| 776 | 0 | |t Adiabatic Logic |b Texte imprimé |z 9789400737273 | |
| 776 | 0 | |t Adiabatic Logic |b Texte imprimé |z 9789400723443 | |
| 776 | 0 | |t Adiabatic Logic |b Texte imprimé |z 9789400723467 | |
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