System-Level Validation : High-Level Modeling and Directed Test Generation Techniques
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, i...
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| Glavni autori: | , , , |
|---|---|
| Format: | Livre numérique |
| Jezik: | Anglais |
| Izdano: |
New York, NY :
Springer New York
2013.
Cham : Springer Nature |
| Online pristup: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Bilješka: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • System-level validation, high-level modeling and directed test generation techniques, Mingsong Chen ... [et al.], New York, Springer, 2013, 1 vol. (XXI-247 p.), 1-461-41358-3 • System-Level Validation, Texte imprimé, 9781461413608 • System-Level Validation, Texte imprimé, 9781489986290 |
Sadržaj:
- Introduction
- Modeling and Specification of SoC Designs
- Automated Generation of Directed Tests
- Functional Test Compaction.- Property Clustering and Learning Techniques
- Decision Ordering Based Learning Techniques
- Synchronized Generation of Directed Tests
- Learning-Oriented Property Decomposition Approaches
- Directed Test Generation for Multicore Architectures
- Test Generation for Cache Coherence Validation.- Reuse of System-Level Tests for Implementation Validation
- Conclusion.