Integrated optical interconnect architectures for embedded systems
This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical inte...
שמור ב:
| מחברים אחרים: | , |
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| פורמט: | Livre numérique |
| שפה: | Anglais |
| יצא לאור: |
New York, NY :
Springer New York
2013.
Cham : Springer Nature |
| סדרה: | Embedded Systems
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| נושאים: | |
| גישה מקוונת: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| הערה: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Integrated optical interconnect architectures for embedded systems, Ian O'Connor, Gabriela Nicolescu, editors, New York, Springer, 2013, 1 vol. (XII-269 pages), Embedded systems, 978-1-441-96192-1 • Integrated Optical Interconnect Architectures for Embedded Systems, Texte imprimé, 9781441961945 • Integrated Optical Interconnect Architectures for Embedded Systems, Texte imprimé, 9781489992048 |
תוכן הענינים:
- Preface
- Basics for high-performance computing and optical interconnect
- Interconnect issues in high-performance computing architectures
- Technologies and building blocks for on-chip optical interconnects
- On-chip optical communication topologies
- Designing chip-level nanophotonic interconnection networks
- FONOC: a Fat-Tree based optical network-on-chip for multiprocessor system-on-chip
- On-chip optical ring bus communication architecture for heterogeneous MPSoC
- System integration and optical-enhanced MPSoC performance
- A protocol stack architecture for optical network-on-chip: Organization and performance evaluation
- Reconfigurable photonic networks on chip
- System Level Exploration for the Integration of Optical Networks on Chip in 3D MPSoC Architectures.

