Advances in computer systems architecture : 8th Asia-Pacific conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003 : proceedings
This conference marked the ?rst time that the Asia-Paci?c Computer Systems Architecture Conference was held outside Australasia (i. e. Australia and New Zealand), and was, we hope, the start of what will be a regular event. The conference started in 1992 as a workshop for computer architects in Aust...
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| Autor kompanije: | |
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| Daljnji autori: | , |
| Format: | Livre numérique |
| Jezik: | Anglais |
| Izdano: |
Berlin [etc.] :
Springer
[20..].
Cham : Springer Nature |
| Serija: | Lecture notes in computer science
2823 |
| Teme: | |
| Online pristup: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Bilješka: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Advances in computer systems architecture, 8th Asia-Pacific conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, proceedings, Amos Omondi, Stanislav Sedukhin (eds.), Berlin, Springer, 2003, 1 vol. (XIII-407 p.), Lecture notes in computer science, 3-540-20122-X • Advances in Computer Systems Architecture, Texte imprimé, 9783662166864 |
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- Designing Ultra-large Instruction Issue Windows
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- The Development of System Software for Parallel Supercomputers
- Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA
- Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research
- Design and Implementation of Java Processors
- MOOSS: CPU Architecture with Memory Protection and Support for OOP
- Reducing Access Count to Register-Files through Operand Reuse
- SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator
- Towards an Asynchronous MIPS Processor
- On Implementing High Level Concurrency in Java
- Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
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- A New On-the-fly Summation Algorithm
- State Reordering for Low Power Combinational Logic
- User-Level Management of Kernel Memory
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- L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
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- Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor
- Performance of the AchillesRouter
- Latency Improvement in Virtual Multicasting
- A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks.

