Formal methods in computer-aided design : third international conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000 : proceedings
The biannual Formal Methods in Computer Aided Design conference (FMCAD 2000)is the third in a series of conferences under that title devoted to the use of discrete mathematical methods for the analysis of computer hardware and so- ware. The work reported in this book describes the use of modeling la...
সংরক্ষণ করুন:
| সংস্থা লেখক: | |
|---|---|
| অন্যান্য লেখক: | , |
| বিন্যাস: | Livre numérique |
| ভাষা: | Anglais |
| প্রকাশিত: |
Berlin [etc.] :
Springer
[20..].
Cham : Springer Nature |
| মালা: | Lecture notes in computer science
1954 |
| বিষয়গুলি: | |
| অনলাইন ব্যবহার করুন: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| টীকা: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Formal methods in computer-aided design, third international conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, proceedings, Warren A. Hunt, Jr., Steven D. Johnson, eds, 2000, New York, Springer, 1 vol (XI-537 p.), Lecture notes in computer science, 3-540-41219-0 • Formal Methods in Computer-Aided Design, Texte imprimé, 9783662211731 |
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| 009 | PPN155192558 | ||
| 020 | |a 9783540409229 (PDF) | ||
| 041 | 0 | |a eng | |
| 082 | |a 004 | ||
| 111 | 2 | |a International conference on Formal Methods in Computer-Aided Design |n (03 |d :2000 |c :Austin, Texas). | |
| 245 | 1 | 0 | |a Formal methods in computer-aided design : |b third international conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000 : proceedings |c [edited by] Warren A. Hunt Jr., Steven D. Johnson. |
| 260 | |a Berlin [etc.] : |b Springer. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
| 490 | 0 | |a Lecture notes in computer science |v 1954 |x 1611-3349 | |
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 0 | |a Applications of Hierarchical Verification in Model Checking -- Applications of Hierarchical Verification in Model Checking -- Invited Talk -- Trends in Computing -- Invited Paper -- A Case Study in Formal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon TM Processor -- Contributed Papers -- An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps -- Automated Refinement Checking for Asynchronous Processes -- Border-Block Triangular Form and Conjunction Schedule in Image Computation -- B2M: A Semantic Based Tool for BLIF Hardware Descriptions -- Checking Safety Properties Using Induction and a SAT-Solver -- Combining Stream-Based and State-Based Verification Techniques -- A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles -- Correctness of Pipelined Machines -- Do You Trust Your Model Checker? -- Executable Protocol Specification in ESL -- Formal Verification of Floating Point Trigonometric Functions -- Hardware Modeling Using Function Encapsulation -- A Methodology for the Formal Analysis of Asynchronous Micropipelines -- A Methodology for Large-Scale Hardware Verification -- Model Checking Synchronous Timing Diagrams -- Model Reductions and a Case Study -- Modeling and Parameters Synthesis for an Air TrafficManagement System -- Monitor-Based Formal Specification of PCI -- SAT-Based Image Computation with Application in Reachability Analysis -- SAT-Based Verification without State Space Traversal -- Scalable Distributed On-the-Fly Symbolic Model Checking -- The Semantics of Verilog Using Transition System Combinators -- Sequential Equivalence Checking by Symbolic Simulation -- Speeding Up Image Computation by Using RTL Information -- Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs -- Symbolic Simulation with Approximate Values -- A Theory of Consistency for Modular Synchronous Systems -- Verifying Transaction Ordering Properties in Unbounded Bus Networks through Combined Deductive/Algorithmic Methods -- Visualizing System Factorizations with Behavior Tables. | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a The biannual Formal Methods in Computer Aided Design conference (FMCAD 2000)is the third in a series of conferences under that title devoted to the use of discrete mathematical methods for the analysis of computer hardware and so- ware. The work reported in this book describes the use of modeling languages and their associated automated analysis tools to specify and verify computing systems. Functional veric ation has become one of the principal costs in a modern computer design e ort. In addition,verica tion of circuit models, timing,power, etc., requires even more eo rt. FMCAD provides a venue for academic and - dustrial researchers and practitioners to share their ideas and experiences of using discrete mathematical modeling and veric ation. It is noted with interest by the conference chairmen how this area has grown from just a few people 15 years ago to a vibrant area of research, development, and deployment. It is clear that these methods are helping reduce the cost of designing computing systems. As an example of this potential cost reduction, we have invited David Russino of Advanced Micro Devices, Inc. to describe his veric ation of ?oating-point - gorithms being used in AMD microprocessors. The program includes 30 regular presentations selected from 63 submitted papers. | ||
| 650 | |a Conception assistée par ordinateur | ||
| 650 | |a Informatique | ||
| 650 | |a Circuits intégrés | ||
| 650 | |a Intelligence artificielle | ||
| 650 | |a Ordinateurs | ||
| 650 | |a Logique symbolique et mathématique | ||
| 650 | |a Ordinateurs | ||
| 650 | |a Vérification (épistémologie) | ||
| 650 | |a Actes de congrès | ||
| 700 | 1 | |a Hunt, Warren A. Jr., |d 1958- |4 pbd | |
| 700 | 1 | |a Johnson, Steven Dexter, |d 1948- |4 pbd | |
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| 776 | 0 | |t Formal Methods in Computer-Aided Design |b Texte imprimé |z 9783662211731 | |
| 856 | 4 | |q PDF |u https://doi.org/10.1007/3-540-40922-X |z Accès sur la plateforme de l'éditeur | |
| 856 | 4 | |u https://revue-sommaire.istex.fr/ark:/67375/8Q1-KH6BQ1PG-0 |z Accès sur la plateforme Istex | |
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| 997 | |0 948842 |1 Livre numérique |a Ressource numérique |b INSA |b ENSA |c 0/Bibliothèque numérique/ |c 1/Bibliothèque numérique/Autre ressource numérique/ | ||