Computer aided verification : ; proceedings 16th international conference, CAV 2004, Boston, MA, USA, July 13-17, 2004

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Detalles Bibliográficos
Autor Corporativo: International conference on computer-aided verification :Boston, Mass.
Otros Autores: Alur, Rajeev, 1966- (Director de publicación), Peled, Doron A., 1962- (Director de publicación)
Formato: Livre numérique
Lenguaje:Anglais
Publicado: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Colección:Lecture notes in computer science 3114
Materias:
Acceso en línea:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Nota: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Computer aided verification, 16th international conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Rajeev Alur, Doron A. Peled (eds.), Berlin, Springer, 2004, 1 vol. (XII-536 p.), Lecture notes in computer science, 3-540-22342-8
• Computer Aided Verification, Texte imprimé, 9783662165188
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260 |a Berlin [etc.] :  |b Springer. 
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490 0 |a Lecture notes in computer science  |v 3114  |x 1611-3349 
500 |a Archives Springer e-books (Licence nationale) 
500 |a Archives Springer e-books (Licence nationale) 
505 0 |a Rob Tristan Gerth: 1956 2003 -- Static Program Analysis via 3-Valued Logic -- Deductive Verification of Pipelined Machines Using First-Order Quantification -- A Formal Reduction for Lock-Free Parallel Algorithms -- An Efficiently Checkable, Proof-Based Formulation of Vacuity in Model Checking -- Termination of Linear Programs -- Symbolic Model Checking of Non-regular Properties -- Proving More Properties with Bounded Model Checking -- Parallel LTL-X Model Checking of High-Level Petri Nets Based on Unfoldings -- Using Interface Refinement to Integrate Formal Verification into the Design Cycle -- Indexed Predicate Discovery for Unbounded System Verification -- Range Allocation for Separation Logic -- An Experimental Evaluation of Ground Decision Procedures -- DPLL(T): Fast Decision Procedures -- Verifying ?-Regular Properties of Markov Chains -- Statistical Model Checking of Black-Box Probabilistic Systems -- Compositional Specification and Model Checking in GSTE -- GSTE Is Partitioned Model Checking -- Stuck-Free Conformance -- Symbolic Simulation, Model Checking and Abstraction with Partially Ordered Boolean Functional Vectors -- Functional Dependency for Verification Reduction -- Verification via Structure Simulation -- Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures -- Abstraction-Based Satisfiability Solving of Presburger Arithmetic -- Widening Arithmetic Automata -- Why Model Checking Can Improve WCET Analysis -- Regular Model Checking for LTL(MSO) -- Image Computation in Infinite State Model Checking -- Abstract Regular Model Checking -- Global Model-Checking of Infinite-State Systems -- QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings -- Verification of an Advanced mips-Type Out-of-Order Execution Algorithm -- Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values -- Efficient Modeling of Embedded Memories in Bounded Model Checking -- Understanding Counterexamples with explain -- Zapato: Automatic Theorem Proving for Predicate Abstraction Refinement -- JNuke: Efficient Dynamic Analysis for Java -- The HiVy Tool Set -- ObsSlice: A Timed Automata Slicer Based on Observers -- The UCLID Decision Procedure -- MCK: Model Checking the Logic of Knowledge -- Zing: A Model Checker for Concurrent Software -- The Mec 5 Model-Checker -- PlayGame: A Platform for Diagnostic Games -- SAL 2 -- Formal Analysis of Java Programs in JavaFAN -- A Toolset for Modelling and Verification of GALS Systems -- WSAT: A Tool for Formal Analysis of Web Services -- CVC Lite: A New Implementation of the Cooperating Validity Checker -- CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking -- Mechanical Mathematical Methods for Microprocessor Verification. 
506 |a Accès en ligne pour les établissements français bénéficiaires des licences nationales 
506 |a Accès soumis à abonnement pour tout autre établissement 
506 |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 
650 |a Génie logiciel 
650 |a Informatique 
650 |a Logiciels  |x Vérification 
650 |a Circuits intégrés 
650 |a Intelligence artificielle 
650 |a Logique symbolique et mathématique 
650 |a Essais 
650 |a Structure logique 
650 |a Actes de congrès 
700 1 |a Alur, Rajeev,  |d 1966-  |4 pbd 
700 1 |a Peled, Doron A.,  |d 1962-  |4 pbd 
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