Transaction Level Modeling with SystemC : TLM Concepts and Applications for Embedded Systems
Currently employed at STMicroelectronics, Transactional-Level Modeling (TLM) puts forward a novel SoC design methodology beyond RTL with measured improvements of productivity and first time silicon success. The SystemC consortium has published the official TLM development kit in May 2005 to standard...
保存先:
| 第一著者: | |
|---|---|
| フォーマット: | Livre numérique |
| 言語: | Anglais |
| 出版事項: |
New York, NY :
Springer US : Imprint: Springer
[20..].
Cham : Springer Nature |
| オンライン･アクセス: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| 注記: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Transaction level modeling with SystemC, TLM concepts and applications for embedded systems, edited by Frank Ghenassia,..., Dordrecht, Springer, 2005, 1 volume (xiii-271 pages), 0-387-26232-6 |