High-Performance Computing Using FPGAs
This book is concerned with the emerging field of High Performance Reconfigurable Computing (HPRC), which aims to harness the high performance and relative low power of reconfigurable hardware in the form Field Programmable Gate Arrays (FPGAs) in High Performance Computing (HPC) applications. It pre...
Enregistré dans:
| Autres auteurs: | , |
|---|---|
| Format: | Livre numérique |
| Langue: | Anglais |
| Publié: |
New York, NY :
Springer New York : Imprint: Springer
[20..].
Cham : Springer Nature |
| Édition: | 1st ed. 2013. |
| Accès en ligne: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Note: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • High-Performance Computing Using FPGAs, Texte imprimé, 9781461417903 |
Table des matières:
- High-Performance Hardware Acceleration of Asset Simulations Monte Carlo Simulation based Financial Computing on the Maxwell FPGA Parallel Machine Bioinformatics Applications on the FPGA-based High-Performance Computer RIVYERA FPGA-Accelerated Molecular Dynamics FPGA-based HPRC for Bioinformatics Applications High-Performance Computing for Neuroinformatics using FPGA High-Performance FPGA-Accelerated Real-time Search High-Performance Data Processing over N-ary Trees FPGA-based Systolic Computational-Memory Array for Scalable Stencil Computations High performance implementation of RTM seismic modeling on FPGAs: architecture, arithmetic and power issues High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems FPGA-based HPRC Systems for Scientific Applications Accelerating the SPICE Circuit Simulator using an FPGA - A Case Study The Convey Hybrid-Core Architecture Low Cost High Performance Reconfigurable Computing An FPGA-based supercomputer for statistical physics: the weird case of Janus Accelerate Communication, not Computation! High-speed torus interconnect using FPGAs MEMSCALE: Re-architecting memory resources for clusters High-performance computing based on high-speed dynamic reconfiguration Reconfigurable arithmetic for HPC Acceleration of the Discrete Element Method: From RTL to C-Based Design Optimising Euroben Kernels on Maxwell Assessing Productivity of High-Level Design Methodologies for High-Performance Reconfigurable Computers Maximum performance computing with dataflow engines