Modeling, analysis and optimization of network-on-chip communication architectures
Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, perform...
Gardado en:
| Auteurs principaux: | , |
|---|---|
| Formato: | Livre numérique |
| Idioma: | Anglais |
| Publicado: |
Dordrecht :
Springer Netherlands
2013.
Cham : Springer Nature |
| Series: | Lecture Notes in Electrical Engineering
184 |
| Acceso en liña: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400739574 • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400739598 • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400798656 |
Table des matières:
- Introduction
- Literature Survey
- Motivational Example: MPEG-2 Encoder Design
- Target NoC Platform
- NoCPerformance Analysis
- Application-specific NoC Architecture Custimization using Long-range Links
- Analysis and Optimization of Prediction-based Flow Control in Networks-on-Chip
- Design and Management of VFI Partition Networks-on-Chip
- Conclusion
- Bibliography
- Appendix A. Tools and FPGA prototype
- Appendix B. Experiments using the Single-chip Cloud Computer (SCC) Platform.