Modeling, analysis and optimization of network-on-chip communication architectures
Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, perform...
Guardat en:
| Autors principals: | , |
|---|---|
| Format: | Livre numérique |
| Idioma: | Anglais |
| Publicat: |
Dordrecht :
Springer Netherlands
2013.
Cham : Springer Nature |
| Col·lecció: | Lecture Notes in Electrical Engineering
184 |
| Accés en línia: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400739574 • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400739598 • Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, Texte imprimé, 9789400798656 |